Watch the 4th Generation AMD EPYC Genoa “Zen 4” Data Center CPU Reveal Live Here

In less than 24 hours, AMD will unveil the next generation of its EPYC family of CPUs codenamed Genoa that uses the new Zen 4 core architecture.

AMD unveils the next generation of its EPYC Genoa “Zen 4” data center CPU family today, tune in and watch the live stream here!

The AMD Zen 4 range will be split into three families, the standard Zen 4 for EPYC Genoa, the Compute Density-Optimized Zen 4C for EPYC Bergamo, and the Cache-Optimized Zen 4 V-Cache under the EPYC Genoa-X series. Furthermore, the suite will feature a cost-optimized entry-level server known as EPYC Siena which will feature the same Zen 4 cores but on a brand new platform known as SP6 which will once again focus on improving the TCO over SP5. The collection will be classified under the EPYC 8004 family. We’ve already covered the initial specs for the Zen 4 family of servers here.

Join us on November 10 at 10 AM Pacific to watch Together We Save the Datacenters, the livestream premiere of the reveal of the next generation of AMD server processors.

🔵 Tune in to the AMD YouTube channel and subscribe to get an email reminder. #AMD # Together we advance #data centers

– AMD (@AMD) November 1, 2022

AMD EPYC Genoa “Zen 4” CPU Lineup

The standard Zen 4 configuration will have up to 12 CCDs, 96 cores, and 192 threads. Each CCD will come with 32MB of L3 cache and 1MB of L2 cache per core. EPYC 9004 CPUs will pack the latest instructions such as BFLOAT16, VNNU, AVX-512 (256b data path), 57b/52b addressable memory, IOD updated with an internal AMD Gen3 Infinity Fabric architecture with higher bandwidth (de-threading).

The platform will feature 12 DDR5 channel support with DIMM support up to 4800Mbps and includes 2,4,6,8,10,12 interleaving options. Both RDIMMs and 3DS RDIMMs will be supported with 2 DIMMs per channel for up to 6 TB/caps per socket (using 256 GB 3DS RDIMMs). There will be 160 G5 lanes available on the 2P platform, 12 G3 lanes (8 lanes on 1P), 32 SATA lanes, and 64 IO lanes that support CXL 1.1+ with ramifications up to x4 and SDCI (Smart Data Cache Injection). ) .

AMD’s EPYC 9000 “Genoa” family of CPUs will deliver a massive performance boost for servers. We have already seen a 128-core / 256-thread partial configuration that overcomes all chipsets of the current server So a dual-socket configuration with 192 cores and 384 threads will definitely break some world records. The AMD EPYC 9000 Genoa family of CPUs is expected to hit servers by the end of this year, and this will be far ahead of the Intel Sapphire Rapids-SP Xeon lineup that has been pushed back to early 2023.

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